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The Myth About GROUND
IEEE Distinguished Lecturer Presentation hosted jointly by the
IEEE Ottawa EMC, MTT/AP, and CPMT Chapters
Speaker : Dr. Zhiping Yang, Google Inc. , Mountain View, California
Date : Wednesday October 11, 2017
Time : 5:00 PM to 7:00 PM
Location : FIDUS SYSTEMS Inc.,375 Terry Fox Dr. Ottawa, ON, K2K 0J8, www.fidus.com
Parking : Free
Registration: Free, and is on a first to reply basis.
Preference given to IEEE EMC/MTT/AP/CPMT society members.
Seating is limited. E-mail Reservation is required.
Pizza and soft drinks will be served.
Organizer: Dr. Syed Bokhari, Chairman, IEEE Ottawa EMC chapter
Syed.Bokhari@fidus.com
Office: (613) 595 – 0507 Ext. 377
Cell: (613) 355 – 6632
Dr. Qingsheng Zeng , Chairman of the IEEE Ottawa MTT/AP Chapters
qingsheng.zeng.2011@ieee.org
Abstract
GROUND is widely used in high-speed circuit modeling and simulation. However, there are a lot of misconceptions and misunderstandings about ground in the high-speed circuit industry. Does ideal ground really exist? If not, why do we use it in simulations? Should we connect the reference node of S-parameter model to ideal ground? Is ground bounce real and well defined? Should we put partial inductance and resistance on the ground net? What can we do or cannot do with S-parameter model? These questions are commonly asked by high-speed circuit designers. Answers from different people may be quite different and even contradictory. In this presentation, these questions will be answered with some simple, but powerful examples. At the end, the audience should have a better understanding about the ground and how to use it in high-speed simulations.
Biography
Zhiping Yang (S’97-M’00- SM’04) received his B.S. and M.S. degrees in Electrical Engineering from Tsinghua University, Beijing, China, in 1994 and 1997, respectively. He received his Ph.D. degree in Electrical Engineering from the University of Missouri-Rolla in 2000. From 2000 to 2005, he worked for Cisco Systems, San Jose, CA, as a Technical Leader. From 2005 to 2006, he worked for Apple Computer, Cupertino, CA, as a Principal Engineer. From 2006 to 2012, he worked in Nuova Systems (which was acquired by Cisco in 2008) and Cisco Systems, San Jose, CA, as a Principal Engineer. From 2012 to 2015, he worked for Apple, Cupertino, CA, as a Senior Manager. He is currently a senior hardware manager in Google Consumer Hardware Group. His research interests include signal integrity and power integrity methodology development for Die/Package/Board co-design, high-speed optical module, various high-speed cabling solution, high-speed DRAM/storage technology, high-speed serial signaling technology, and RF interference. He has published more than 40 research papers and 17 patents. His research and patents have been applied in Google Chromebook, Apple iPhone 5S/6/6S, Cisco UCS, Cisco Nexus 6K/4K/3K, and Cisco Cat6K products. Dr. Yang is a senior IEEE member and received the 2016 IEEE EMCS Technical Achievement Award.
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