Speaker(s): Dr. Mazin Yousif, Chief Enterprise Architect, Director & Head of Architecture, T-Systems International, GmbH
Date/Time: Tuesday November 15, 2011, 12:30-14:00
Location: SITE 5084, SITE Building, University of Ottawa
Parking: Parking fees apply.
Registration: Free to attend
Organizer: Rami Abielmona
Organizer e-mail: rabielmo@ieee.org
Organized by: Ottawa Section Computer Society Chapter
Url: http://www.ieeeottawa.ca/cs

Abstract: Higher performance/power efficiencies are being reflected in the form of many cores on one processor chip resulting in interesting set of architectural challenges both within the chip and the platform. One primary design consideration is the type and complexity of cores integrated in the processor given the plethora of processor architectures (scalar, ILP, TLP, in-order, out of order, etc.). Similarly, the appropriate cache architecture and the underlying network-on-Chip connecting the caches and cores are design considerations. Others include circuit implementations given certain number of metal/silicon layers, die area size, power budget, and technology. Challenges include those related to power/thermal, performance, and reliability. Similar design considerations exist at the platform level. The primary and most impactful is the memory system architecture supplying enough sustainable memory bandwidth to feed the many cores. Beside bandwidth sustainability, the memory architecture must be optimized for shortest access latency preferably through single hop interconnects. The architecture of network and storage I/O subsystems is very critical to develop well-balanced compute-I/O (network and storage) platforms. Software challenges covering OS, compiler, applications as well as runtime-execution environment including synchronization granularity, locking, and scheduling are even more pronounced. Other challenges are mechanical-related covering packaging, thermal and power; providing enough hooks to effectively manage the platform and possibly partitioning and virtualizing platform resources. This talk will run through a number of the above mentioned design considerations and look at challenges when deploying many-core-processor-based platforms in the enterprise.