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Speaker: Randy Torrance and Dick James, Chipworks)
Time: Wednesday, January 20, 2010 at 7:00 PM
Place: RA Center -- Room Bytown A (2451 Riverside Dr, Ottawa, ON K1H 7X7
Abstract:
The continuous shrinking of feature size to increase the integration level of silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns and demanding the adoption of new and more sophisticated technology to analyze chips. The following types of analysis will be covered in detail:
* product teardown;
* techniques used for system-level analysis, both hardware and software;
* circuit extraction, taking the chip down to the transistor level and working back up through the interconnects to create schematics;
* process analysis, looking at how the chip is made, and what it is made of.
This presentation is an update of an invited paper given at the 2007 IEEE Custom Integrated Circuits Conference (CICC) with more focus on circuit extraction and cross-referencing between circuit schematics and the 1000's of physical layout images obtained through generating a mosaic of scanning electron microscopy across all device layers.
Speaker: Dr. Gwee Bah Hwee , A CASS Distinguished Lecturer - Associate Professor, Nanyang Technological University, School of EEE, Singapore
Time: Tuesday, September 29, 2009, 12.30pm
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Asynchronous-logic is an emerging methodology where the microprocessor will be increasingly asynchronous – 40% by 2020 from the present 11% (ITRS roadmap). It is an alternative design approach (as opposed to prevalent synchronous-logic) to ultra low power digital circuits and it could be robust to the process, voltage and temperature (PVT) variations for biomedical applications and the like. In this talk, an overview from the following perspectives will first be given: some pertinent requirements of biomedical applications, the current-art technology roadmap and its technology challenges, and a review of asynchronous-logic and synchronous-logic. Thereafter, the completed and on-going asynchronous-logic projects will be presented, in part, for the design of low power biomedical applications. These projects include a Fast Fourier Transform processor, an Intel-based 8051 microcontroller, a Motorola-based 24-digital signal processor, and an
asynchronous electronic design automation tool. Finally, some potential projects by adopting asynchronous-logic will be discussed.
Speaker: Dr. Nikhil Adnani, ThinkRF Corp., Ottawa, ON, Canada,
Time: 12:00 noon to 1:00pm, Apr 02, 2009 (Thursday)
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
There're no abstracts for this presentation.
Speaker: Dr. Robson Nunes de Lima, Assistant Professor in the Electrical Engineering Department of Universidade Federal da Bahia (Salvador, Brazil),
Time: 1pm-2pm, Mar 19 (Thursday) - 1:00pm-2:00pm, 2009
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Impedance matching is an essential part of an RF system that is used to maximize the power transfer from a generator to a load and to minimize the reflections from the load. When the load impedance is fixed the impedance matching is not a difficult task, especially for narrowband systems. However in wireless communication systems variations in antenna input impedance can occur. In a portable cellular handset, for instance, this impedance will undergo significant deviation from interaction with the user. This varying impedance can lead to unacceptable degradation in performance of the power amplifier, affecting its output power, efficiency and phase characteristics. Indeed, the load mismatch conditions may result in the presence of over voltage in the output amplifier and may eventually lead to permanent failure of the output transistor due to avalanche breakdown. The overvoltage problem can be solved through different approaches, such as the
utilization of an isolator in the output of amplifier or an active feedback, functioning as a voltage limiter.
These approaches protect the amplifier, but do not avoid the reduction of output power due to the load impedance mismatching. An automatic impedance matching system may be a solution either to avoid overvoltage or to prevent the reduction of output power. This talks describes the constituent blocks of an automatic impedance system , especially a systematic design approach of tunable impedance matching networks. Some practical realizations will be also be presented and discussed.
Speaker: Fadhel Ghannouchi, Fellow of IEEE, Fellow IET IEEE MTT Distinguish Microwave Lecturer, ICORE Professor and Senior Canada Research Chair, Director, iRadio Laboratory Department of Electrical and Computer Engineering University of Calgary, Canada
Time: 3:30-4:30 pm, March 6 (Friday), 2009
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
The next wave in the information revolution will consist of bringing
intelligence to the information and communication technology (ICT) sector,
allowing seamless and intelligent networking and communication between
different users using different services and operators. This will lead to
the convergence of communication technologies, aiming at the development
and deployment of cooperative and ubiquitous networks that involve existing
and future wireless and satellite communications systems.
A critical element in enabling the convergence of different communication
systems is the development of software defined radio (SDR) systems that can
be used across different frequency bands and for multi-standard
applications. This SDR has to be developed to support different frequency
carriers and modulations schemes concurrently, in addition to being power-
and spectrum-efficient, in order to be able handle high data rates, while
being less energy-hungry and more environmentally friendly.
The design of power amplifiers as critical components in any SRD based
communication terminal has to be considered closely together with the
system architecture, in order to ensure optimal system level performances
in terms of linearity and power efficiency. This implies the use of
adequate transmitter architectures that convert the analog baseband
information to architecture dependent amplifier driving signals, such as
sigma-delta, EE&R, Polar and LINC architectures. This talk lays out the
principles behind SDR systems and examines the design of software-enabled
linear and highly efficient RF/DSP co-designed power amplifiers/
transmitters for multi-standard and multi-band applications. Recent
advances and practical realizations will also be presented and discussed.
Speaker: Dr. Velko Tzolov, Co-Founder and Senior Vice President at Palladium7 Corporation, Ottawa, Ont,
Time: 1pm-2pm, Jan 22 (Thursday), 2009
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
The talk will provide a short overview of the evolution of the fiber optics communications in the last decade. The emphasis will be on the DWDM (dense wavelength division multiplexing) and other key technology enablers. The author will also analyze some of the major research, engineering and business challenges and trade offs.
The final part of the presentation will focus on the most recent trends in the DWDM-based NGN (new generation networks) research and development.
Speaker: Professor Garry Tarr, Department of Electronics, Carleton University, Ottawa, Ont ,
Time: 1pm-2pm, Nov. 28 (Fridayday), 2008
Place: 4124ME Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Radon is a naturally occurring radioactive gas produced by the decay of uranium in the earth’s crust. Radon may become trapped in buildings, posing a serious health hazard. Exposure of lung tissue to the alpha particles produced in the decay of radon may cause lung cancer. It is estimated that the mortality due to radon exposure across North America is comparable to that due to traffic accidents. In some regions (including the Ottawa area) mortality from radon can be much higher. There is therefore a strong need for an inexpensive radon monitor that can be widely deployed. This talk describes the development of a simple MOS IC to detect the alpha particles produced in radon decay, and the incorporation of this chip with an electrostatic radon progeny concentrator to form a complete working radon monitor. The new monitor is direct-reading and capable of detecting hazardous levels of radon in approximately one day. This represents a significant
improvement over competing consumer-level techniques for radon detection. It should be possible to produce the monitor at low cost in high volume.
Speaker: Prof. Madhavan Swaminathan, Fellow IEEE, Deputy Director, Packaging Research Center, Georgia Institute of Technology, Atlanta, USA,
Time: 5:00pm-6:15pm, Nov. 10 (Monday), 2008
Place: 5050MC (Minto Center), Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
As the semiconductor industry moves beyond the 45nm node and as systems become more heterogeneous, System on Chip
(SoC) solutions are facing major barriers due to technical and business related reasons. This is leading to the
development of new technological solutions such as System on Package (SoP). SoP, a technology being pioneered by
Georgia Tech, allows for integration of functions in the package. Higher levels of integration are possible by
embedding functions in the substrate and merging the package and board level technologies into one. SoP enables
the integration of digital, RF, opto-electronic and sensor electronics in the package leading to system miniaturization
with micro, nano and bio convergence. This talk will focus on some of the technologies and CAD methods for SoP being
developed at Georgia Tech.
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Speaker: Jianguo Ma, Changjiang (Yangtze River) Professor University of Electronic Sciences and Technology of China Chengdu, China,
Time: 12:00-12:50pm, Tuesday October 7, 2008
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
A single modeling equation is developed, allowing accurate prediction of
both static and dynamic I-V characteristics. The model parameters can be
extracted to match the measured data closely for a wide bias range without
sacrificing accuracy. It is validated through DC as well as power
measurements using GaAs HEMT transistors....
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Speaker: Dr. Andy D Kucar, OTTAWA, Canada,
Time: 7:00pm-8:00pm, Sept. 22 (Monday), 2008
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
For over 60 years, artificial man--made satellites have been providing diverse,
highly available services, worldwide. The Sun is the lifeline of majority of satellite space
segments, providing to satellites a thermal equilibrium, and, via solar cells, the electric energy.
When the Sun becomes obscured by the Earth or by the Moon, a solar eclipse occurs.....
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Speaker: Professor Huei Wang, National Taiwan University,
Time: Monday June 23rd, 2008 - 4:00-5:00PM
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
The anticipated presentation will cover the current status and future
trends of millimeter-wave MMICs, including those using III-V compound (GaAs,
InP, GaN, etc.) and Si-based (CMOS, SiGe HBT and BiCMOS) MMIC technologies.
Millimeter-wave MMICs used to be applied to military and astronomy systems for
long time and started to be utilized for civil applications in the decade...
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Speaker: Dr. David Root, Agilent Technologies, Santa Rosa, California,
Time: Monday, Mar. 31, 2008, 12:00pm - 12:50pm Overview; 1:00pm 2:00pm Technical Advances
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Modern microwave systems are designed in a top-down hierarchical process, with
specifications starting at the system level, propagating down towards the
subsystem, module, integrated circuit, and finally to the level of the
transistor, resistor, and other fundamental electronic building blocks...
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Speaker: Dr. Pawel Hawrylak, National Research Council of Canada,
Time: Mar. 4, 2008, 1:30pm - 3:00pm (Tuesday)
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Quantum processing of information requires the development of quantum systems which are at the same time coherent and quantum in nature, and yet easily manipulated to process and extract classical information. To meet this challenge...
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Speaker: Dr. Patrick G. Drennan, Chief Technology Officer, Solido Design Automation, San Ramon, CA
Time: Feb. 12, 2008, 1:30pm - 2:30pm (Tuesday)
Place: 4124ME, Department of Electronics, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
As process technologies and supply voltages shrink, designers are faced with a pressing need to address systematic and random sources of variation in a more deliberate and thorough way. Accounting for variation within the flow of design has not progressed commensurate with the process technologies. We still rely on best-, worst- case corners, mismatch plots and maybe a Monte Carlo verification if there
is enough time. It is time for a new approach. This talk will begin with a brief review of the physical phenomena and industry standard device models for variation sources, including random local and global variations and systematic proximity effects. New techniques to accelerate, increase accuracy and derive more information from statistical variation analysis will be presented.
Biography:
Patrick Drennan is Chief Technology Officer of Solido Design Automation, Inc. Prior to joining Solido, Patrick was a Distinguished Member of the Technical Staff at Freescale Semiconductor (formerly Motorola, Inc.). Patrick was one of the creators of the backwards propagation of variance (BPV) method for statistical characterization. This model guarantees consistency between simulation and silicon measurement and it is valid for all biases and geometries, which are significant attributes for design. His mismatch (local variation) model earned the Best Regular paper at the 2002 IEEE Custom Integrated Circuit Conference. He was the first to describe the impact of shallow trench isolation (STI) and well proximity effect (WPE) on design, demonstrating that the WPE produces a graded channel MOSFET. More importantly, he showed the catastrophic impact these unforeseen phenomena can have on circuit design. For this work, he received the Best Invited Paper at the 2006 IEEE Custom Integrated Circuit Conference. Patrick has extensive experience in measurement, modeling, characterization, test structure generation and design application of systematic and stochastic semiconductor variations. Patrick received the B.S. degree in microelectronic engineering and M.S. degree in electrical engineering from Rochester Institute of Technology and the Ph.D. degree in electrical engineering from Arizona State University.
Speaker: Prof. Anantha Chandrakasan, Director of the MIT Microsystems Technology Laboratories, MA
Time: Dec. 20, 2007, 2:00pm - 3:30pm (Thursday)
Place: 5050MC (Minto Center), Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Energy efficient system design requires systematic optimization at all levels of the design abstraction ranging from devices and circuits to architectures and algorithms. The design of micro-power systems will enable operation using energy scavenging. A major opportunity to reduce the power dissipation of digital circuits is to scale the power supply voltage below the device thresholds (i.e., sub-threshold operation). The opportunities and challenges associated with sub-threshold design will be presented. This includes variation-aware design for logic and SRAM circuits, efficient DC-DC converters for ultra-low-voltage delivery, and algorithm structuring to support extreme parallelism. A number of integrated circuit examples that demonstrate sub-threshold operation will be presented. Other power management techniques such as ultra-dynamic-voltage scaling, fine-grained power gating and 3-D integration will be discussed. The use of highly digital architectures for wireless communication circuits can also significantly reduce system energy dissipation. Specific examples of power management will be presented, focusing on wireless sensor networks and impulse based ultra-wideband communications as drivers.
Biography:
Anantha P. Chandrakasan received the B.S, M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1989, 1990, and 1994 respectively. Since September 1994, he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering.
He was a co-recipient of several awards including the 1993 IEEE Communications Society's Best Tutorial Paper Award, the IEEE Electron Devices Society's 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, the 1999 DAC Design Contest Award, the 2004 DAC/ISSCC Student Design Contest Award, and the ISSCC 2007 Beatrice Winner Award for Editorial Excellence.
His research interests include low-power digital integrated circuit design, wireless microsensors, ultra-wideband radios, and emerging technologies. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Sub-threshold Design for Ultra-Low Power Systems (Springer 2006). He is also a co-editor of Low Power CMOS Design (IEEE Press, 1998), Design of High-Performance Microprocessor Circuits (IEEE Press, 2000), and Leakage in Nanometer CMOS Technologies (Springer, 2005).
He has served as a technical program co-chair for the 1997 International Symposium on Low Power Electronics and Design (ISLPED), VLSI Design '98, and the 1998 IEEE Workshop on Signal Processing Systems. He was the Signal Processing Sub-committee Chair for ISSCC 1999-2001, the Program Vice-Chair for ISSCC 2002, the Program Chair for ISSCC 2003, and the Technology Directions Sub-committee Chair for ISSCC 2004-2007. He was an Associate Editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He served on SSCS AdCom from 2000 to 2007 and he was the meetings committee chair from 2004 to 2007. He is the Technology Directions Chair for ISSCC 2008. He is the Director of the MIT Microsystems Technology Laboratories.
Speaker: Speaker:Dr. C. J. Reddy, President, EM Software & Systems (USA) Inc,
Time: July 24, 12:30 - 2pm (Tuesday)
Place: 4124ME, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
Though Radio Frequency Identification (RFID) systems have been in use for various applications in the past, currently they are gaining popularity due to their application to retail supply chain management systems. Compared to low-frequency (LF) and high-frequency (HF) RFID systems (which operate through near-field inductive coupling and thus have relatively short read range), ultra high frequency (UHF) RFID systems operate through farfield backscattering, have larger read range, and have been widely used in supply chain management and inventory control. However, very often the electromagnetic (EM) performance of the reader/tag systems could be significantly degraded due to the complex physical environments. With the aid of computational electromagnetic (CEM) tools, such situations can be analyzed and optimized to improve the performance of RFID systems. This talk presents options for the EM characterization of such systems with the aid of full wave or hybrid numerical methods. Analysis of RFID tags, readers, tag placement, tag/reader coupling, and tag/reader systems in complex environments will be addressed.
Speaker: Speaker:Prof. Lin Zhiping,Electrical and Electronic Engineering, Nanyang Technological University (NTU), Singapore
Time: Time -Mon, June 04, 11 A.M.. – 12 noon
Place: 4124ME, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
A new method is presented to calculate state space realizations of a three-dimensional (3D) image set. It is based on interpreting the image set as the impulse response of a 3D separable system. The proposed realization algorithm consists of two parts:
1.) Decomposition of a 3D image set into the product of three 1D components;
2.) Balanced state space realizations of finite 1D sequences.
The proposed method can be used for realizing the given 3D images exactly or approximately. The advantage of the method is noise can be reduced with little degradation on the image quality. It has been successfully applied in noise reduction of various 3D image sets of fluorescently labeled cells acquired by a fluorescent microscope. It can be used for noise reduction in a 3D image set or for noise suppression of a point spread function (PSF) which is an essential component in any 3D deconvolution algorithms.
Speaker: Speaker: Dr. Michael Brett, Canada Research Chair in Nanoengineered Thin Films, Director of Engineering Physics, Dept. of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada
Time: Time - Mon, March 19, 1.00p.m. - 2:30p.m.
Place: 4124ME, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
The presentation will start with an overview of nanofabrication facilities available at the University of Alberta, including the Micromachining and Nanofabrication Facility (NanoFab – open to external users), and at the NRC National Institute for Nanotechnology. Next the nanostructure fabrication work of the Brett group will be introduced, detailing the glancing angle deposition (GLAD) process capable of fabricating sub-micrometer arrays of posts, chevrons, helices, and square spirals. Recent developments will be highlighted including indirect and direct fabrication of self organized organic microstructures and 3D periodically structured semiconductors in a square spiral architecture. Applications to sensors, chiral optic devices, luminescent devices, and photonic crystals will be described.
Speaker: Dr. James Rautio, Sonnet Software, Syracuse, USA
Time: Nov. 17 (Friday), 10.45A.M. - 12 Noon
Place: 5050MC, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
This lecture is intended for graduate and advanced undergraduate students who are or might soon be studying electromagnetics. There are no equations of any kind in the lecture. In fact the lecture is presented without notes, PowerPoint slides, or even a blackboard. It is purely conceptual. Audience participation is encouraged.
The lecture illustrates points from an applied perspective starting with a simple problem, a plane wave reflecting from a perfect conductor. Understanding why this happens is emphasized. Once "why" is understood, the equations (which are not presented in this lecture) are easier to understand. We also illustrate that understanding "why" has a limit, which leaves us with, frankly, a truly amazing universe.
The lecture then proceeds with a discussion of the Method of Moments. This lecturer had the good fortune of being a student of Roger Harrington, the father of the Method of Moments over a period of three years. Another three decades have been spent applying it to the precise EM analysis of planar circuits (including things like printed circuit boards and RF integrated circuits). The audience will be treated to an initial understanding in three minutes, with more detail following.
Given that there is enough time, the lecture concludes with an example where Maxwell's equations fail (the low power double slit experiment), but where another field, Quantum Electrodynamics (QED) succeeds. This portion of the lecture is modeled after Richard Feynman's lecture on the topic.
Finally, if a thick telephone book is provided (that can be destroyed), the lecture ends with a magic trick. This lecture is intended to provide motivation for students wondering, "Why are we doing all this stuff, anyway?"
Speaker: Dr. James Rautio, Sonnet Software, Syracuse, USA
Time: Nov. 17 (Friday), 2.00p.m. - 3:30p.m
Abstract:
James Clerk Maxwell stands shoulder to shoulder with Newton and Einstein, yet even those of us who have spent decades working with Maxwell's equations are almost totally unfamiliar with his life and times. This presentation, from the viewpoint of a microwave engineer, draws on many sources in providing an understanding of James Maxwell himself.
What was Maxwell like as an infant? What was the tragedy at eight years old that profoundly influenced his life? What unique means of transportation did young Maxwell use to escape a cruel tutor? What memorable event occurred on his first day of school? When did he publish his first papers, and what were they about? What did Maxwell have to do with the rings of Saturn? Why did he lose his job as a professor? Why did he have a hard time getting another job? What was his wife like? What is Maxwell's legacy to us?
The answers to these questions provide insight into Maxwell the person and add an extra dimension to those four simple equations we have studied ever since. There are no equations in this presentation. The presentation is appropriate for anyone with a general interest in the origins of modern physics. For electronic handouts for the lecture, visit www.sonnetsoftware.com and click on the large Distinguished Microwave Lecture Series" button at the bottom of the "News" section.
Speaker: Carl Sechen, University of Texas at Dallas)
Time: Oct. 02 (Monday), 2.00p.m. - 3:30p.m.
Place: 4124ME, Carleton University, 1125 Colonel By Drive, Ottawa
Abstract:
We are developing a cell selection capability (from a cell library) that aims to enable the design of digital circuits that have the lowest possible power consumption for any desired speed goal, and whose leakage power is maintained below the specified limit. It is anticipated that this approach will yield circuits that have substantially lower total power and lower leakage for the same delays achieved today. The global optimization is performed over all the options available in the cell library (drive strengths, beta ratios, channel lengths, threshold voltages, etc.)....
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Speaker: L. K. Maheshwari, Pro-Vice Chancellor & Director, Birla Institute of Technology & Science, Pilani (India)
Time: Wed, June. 28, 1.00p.m. - 2:30p.m.
Abstract:
The talk covers the mode and scope of industry linkages among the premier institutions of India, including, IIT (Indian Institute of Technology), Delhi & Chennai, IISc.( Indian Institute of Sciences), Bangalore, BITS (Birla Institute of Technology & Science), Pilani, JNU (Jawahar Lal Nehru University), Delhi, Pune University, Hyderabad University, and Jadavpur University. It also highlights the emerging aspects of university-industry collaborations in India, in the context of the technological revolution that’s sweeping the country, with emphasis on electrical and information technology segments...
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Speaker: Dr. Poman So, Assistant professor, University of Victoria (UVic),
Time: Thu, May 11, 02:00 PM - 03:00 PM
Abstract:
There are many popular numerical techniques for electromagnetic wave
modeling. These techniques can be divided into the frequency-domain and
time-domain methods. Since no one single method is suitable for all areas of
application, a gener...
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Speaker: Dr. Wei-Ping Huang, Dept. of Electrical and Computer Engineering, McMaster University
Time: Fri, Oct 21, 03:00 PM - 04:30 PM
Abstract:
The tremendous growth in broadband access services has propelled the development and deployment of photonics technology to a new frontier for which the efficient and cost-effective delivery of optical bandwidth to the end user (residential homes a...
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Speaker: Dr. Vijay K. Sood, Senior Researcher, IREQ (Hydro-Québec), Montreal
Time: Fri, Sep 23, 01:30 PM - 03:00 PM
Abstract:
The solution of power electronic circuits has traditionally been accomplished by equation solvers such as Matlab or by circuit simulators such as PSpice and EMTP. The talk covers the fundamentals and trends in modeling and analysis of power electr...
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Advances in High-Speed Low Power Circuit Techniques
Speaker: Prof. Atila Alvandpour, Department of Electrical Engineering, Linköping University, Sweden
Time: Fri, Jul 29, 01:00 PM - 02:30 PM
Abstract:
The enormous capability of the present and future advanced CMOS technologies encourages increasingly large and complex chips. On the other hand, today’s design strategies, methodologies, system architectures, and circuit techniques are not suffici...
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Speaker: Dr. YUHUA CHENG, Chief Scientist, Siliconlinx Inc.
Time: Mon, Jul 11, 01:00 PM - 02:30 PM
Abstract:
As an important link between process technologies and circuit design, compact modelling has become more critical than ever as advanced process development enters into nano-scale and wireless era. Novel physical effects and new electrical behavior...
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Reliable Circuit Techniques for Low-Voltage Analog Design in Deep Submicron
Speaker: Dr. Christian Fayomi, Assistant Professor, Université du Québec à Montréal (UQÀM)
Time: Thu, May 26, 09:30 AM - 10:30 AM
Abstract:
An overview of circuit techniques dedicated to design reliable low-voltage (1-V and below) analog functions in deep submicron standard CMOS processes. The challenges of designing such low-voltage and reliable analog building blocks are addressed b...
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Speaker: Pavel Cheben
Time: Thu, Mar 10, 10:30 AM - 11:30 AM
Abstract:
Recent advances in silicon microphotonics will be presented together with various fundamental challenges that emerge in a microphotonic regime where the structures that confine and guide light have dimensions comparable to the wavelength of light....
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Speaker: Doug Smeaton, President & CEO, Semiconductor Insights Inc.
Time: Fri, Nov 19, 01:00 PM - 02:30 PM
Abstract:
Whether you're involved in engineering research or product development, you
need to understand what's going on with intellectual property licensing and
litigation in the marketplace. Visionary organizations have recognized that
the development of...
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Quantum Computing and Nano-Technology
Speaker: Handol Kim, Vice President, Business Development, D-Wave Systems Inc www.dwavesys.com, Vancouver, Canada
Time: Fri, Nov 05, 01:00 PM - 02:30 PM
Abstract:
While CMOS/Silicon-based computing has served to be a robust and
effective medium for High-Performance Computing (HPC), there exist entire
classes of computational problems that cannot ever be addressed effectively
through silicon, even if Moore'...
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Design Automation for simulation and optimization of current-and next-generation optoelectronic devices
Speaker: Matthew Frank, Senior Application Engineer, RSoft Design Group.
Time: Thu, Sep 30, 01:00 PM - 02:30 PM
Abstract:
Design automation software is critical for simulation and
optimization of current-and next-generation optoelectronic devices. First,
new developments in RSoft design tools for photonic crystal related
applications are presented. Next, our design t...
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